; 68HC908GP20/32 Equates
; Updated by Mario Becroft
; 8/10/99 included equates for many (not all) register bits
; xxx is bit no, xxx. is bit mask

PTA    EQU $0000     ; Ports and data direction
PORTA  EQU $0000
PTB    EQU $0001
PORTB  EQU $0001
PTC    EQU $0002
PORTC  EQU $0002
PTD    EQU $0003
PORTD  EQU $0003
DDRA   EQU $0004
DDRB   EQU $0005
DDRC   EQU $0006
DDRD   EQU $0007
PTE    EQU $0008
PORTE  EQU $0008
DDRE   EQU $000C

PTAPUE  EQU $000D    ; Port pull-up enables
PTCPUE  EQU $000E
PTDPUE  EQU $000F

SPCR    EQU $0010    ; SPI (Syncronous communications)
SPSCR   EQU $0011
SPDR    EQU $0012

SPRIE		equ	7
DMAS		equ	6
SPMSTR		equ	5
CPOL		equ	4
CPHA		equ	3
SPWOM		equ	2
SPE		equ	1
SPTIE		equ	0
SPRIE.		equ	$80
DMAS.		equ	$40
SPMSTR.		equ	$20
CPOL.		equ	$10
CPHA.		equ	$08
SPWOM.		equ	$04
SPE.		equ	$02
SPTIE.		equ	$01

SPRF		equ	7
ERRIE		equ	6
OVRF		equ	5
MODF		equ	4
SPTE		equ	3
MODFEN		equ	2
SPR1		equ	1
SPR0		equ	0
SPRF.		equ	$80
ERRIE.		equ	$40
OVRF.		equ	$20
MODF.		equ	$10
SPTE.		equ	$08
MODFEN.		equ	$04
SPR1.		equ	$02
SPR0.		equ	$01


SCC1    EQU $0013    ; SCI (Asyncronous communications)
SCC2    EQU $0014
SCC3    EQU $0015
SCS1    EQU $0016
SCS2    EQU $0017
SCDR    EQU $0018
SCBR    EQU $0019

LOOPS		equ	7
ENSCI		equ	6
TXINV		equ	5
M		equ	4
WAKE		equ	3
ILTY		equ	2
PEN		equ	1
PTY		equ	0
LOOPS.		equ	$80
ENSCI.		equ	$40
TXINV.		equ	$20
M.		equ	$10
WAKE.		equ	$08
ILTY.		equ	$04
PEN.		equ	$02
PTY.		equ	$01

SCTIE		equ	7
TCIE		equ	6
SCRIE		equ	5
ILIE		equ	4
TE		equ	3
RE		equ	2
RWU		equ	1
SBK		equ	0
SCTIE.		equ	$80
TCIE.		equ	$40
SCRIE.		equ	$20
ILIE.		equ	$10
TE.		equ	$08
RE.		equ	$04
RWU.		equ	$02
SBK.		equ	$01

R8		equ	7
T8		equ	6
DMARE		equ	5
DMATE		equ	4
ORIE		equ	3
NEIE		equ	2
FEIE		equ	1
PEIE		equ	0
R8.		equ	$80
T8.		equ	$40
DMARE.		equ	$20
DMATE.		equ	$10
ORIE.		equ	$08
NEIE.		equ	$04
FEIE.		equ	$02
PEIE.		equ	$01

SCTE		equ	7
TC		equ	6
SCRF		equ	5
IDLE		equ	4
OR		equ	3
NF		equ	2
FE		equ	1
PE		equ	0
SCTE.		equ	$80
TC.		equ	$40
SCRF.		equ	$20
IDLE.		equ	$10
OR.		equ	$08
NF.		equ	$04
FE.		equ	$02
PE.		equ	$01

BKF		equ	1
RPF		equ	0
BKF.		equ	$02
RPF.		equ	$01

SCP1		equ	5
SCP0		equ	4
SCR2		equ	2
SCR1		equ	1
SCR0		equ	0
SCP1.		equ	$20
SCP0.		equ	$10
SCR2.		equ	$04
SCR1.		equ	$02
SCR0.		equ	$01

INTKBSCR EQU $001a   ; Keyboard interrupt control/status
INTKBIER EQU $001b

TBCR    EQU $001c    ; Time base module

TBIF		equ	7
TBR2		equ	6
TBR1		equ	5
TBR0		equ	4
TACK		equ	3
TBIE		equ	2
TBON		equ	1
TBIF.		equ	$80
TBR2.		equ	$40
TBR1.		equ	$20
TBR0.		equ	$10
TACK.		equ	$08
TBIE.		equ	$04
TBON.		equ	$02


INTSCR  EQU $001d    ; IRQ status/control

CONFIG2 EQU $001e    ; System configuration

OSCSTOPENB	equ	1
SCIBDSRC	equ	0
OSCSTOPENB.	equ	$02
SCIBDSRC.	equ	$01

CONFIG1 EQU $001f

COPRS		equ	7
LVISTOP		equ	6
LVIRSTD		equ	5
LVIPWRD		equ	4
LVI5OR3		equ	3
SSREC		equ	2
STOP		equ	1
COPD		equ	0
COPRS.		equ	$80
LVISTOP.	equ	$40
LVIRSTD.	equ	$20
LVIPWRD.	equ	$10
LVI5OR3.	equ	$08
SSREC.		equ	$04
STOP.		equ	$02
COPD.		equ	$01

T1SC    EQU $0020    ; Timer 1
T1CNTH  EQU $0021
T1CNTL  EQU $0022
T1MODH  EQU $0023
T1MODL  EQU $0024
T1SC0   EQU $0025
T1CH0H  EQU $0026
T1CH0L  EQU $0027
T1SC1   EQU $0028
T1CH1H  EQU $0029
T1CH1L  EQU $002a

T2SC    EQU $002b    ; Timer 2
T2CNTH  EQU $002c
T2CNTL  EQU $002d
T2MODH  EQU $002e
T2MODL  EQU $002f
T2SC0   EQU $0030
T2CH0H  EQU $0031
T2CH0L  EQU $0032
T2SC1   EQU $0033
T2CH1H  EQU $0034
T2CH1L  EQU $0035

TOF		equ	7
TOIE		equ	6
TSTOP		equ	5
TRST		equ	4
PS2		equ	2
PS1		equ	1
PS0		equ	0
TOF.		equ	$80
TOIE.		equ	$40
TSTOP.		equ	$20
TRST.		equ	$10
PS2.		equ	$04
PS1.		equ	$02
PS0.		equ	$01

CHF		equ	7
CHIE		equ	6
MSB		equ	5
MSA		equ	4
ELSB		equ	3
ELSA		equ	2
TOV		equ	1
CHMAX		equ	0
CHF.		equ	$80
CHIE.		equ	$40
MSB.		equ	$20
MSA.		equ	$10
ELSB.		equ	$08
ELSA.		equ	$04
TOV.		equ	$02
CHMAX.		equ	$01

PCTL    EQU $0036    ; Phase lock loop (for crystals)
PBWC    EQU $0037
PMSH    EQU $0038
PMSL    EQU $0039
PMRS    EQU $003A
PMDS    EQU $003B

AUTO		equ	7
LOCK		equ	6
PLLON		equ	5
BCS		equ	4
AUTO.		equ	$80
LOCK.		equ	$40
PLLON.		equ	$20
BCS.		equ	$10

ADSCR   EQU $003C    ; A to D converter
ADR     EQU $003D
ADCLK   EQU $003E

COCO		equ	7
AIEN		equ	6
ADCO		equ	5
ADCH4		equ	4
ADCH3		equ	3
ADCH2		equ	2
ADCH1		equ	1
ADCH0		equ	0
COCO.		equ	$80
AIEN.		equ	$40
ADCO.		equ	$20
ADCH4.		equ	$10
ADCH3.		equ	$08
ADCH2.		equ	$04
ADCH1.		equ	$02
ADCH0.		equ	$01

ADIV2		equ	7
ADIV1		equ	6
ADIV0		equ	5
ADICLK		equ	4
ADIV2.		equ	$80
ADIV1.		equ	$40
ADIV0.		equ	$20
ADICLK.		equ	$10

SBSR    EQU $fe00    ; System integration
SRSR    EQU $fe01
SUBAR   EQU $fe02
SBFCR   EQU $fe03

INT1    EQU $fe04    ; Interrupt status
INT2    EQU $fe05
INT3    EQU $fe06

FLTCR   EQU $fe07    ; Flash test/programming
FLCR    EQU $fe08

HVEN		equ	3
MASS		equ	2
ERASE		equ	1
PGM		equ	0
HVEN.		equ	$08
MASS.		equ	$04
ERASE.		equ	$02
PGM.		equ	$01

BRKH    EQU $fe09    ; Hardware breakpoint
BRKL    EQU $fe0a
BRKSCR  EQU $fe0b

LVISR   EQU $fe0c    ; Low voltage detect

FLBPR   EQU $ff7e    ; Flash boot protect

COPCTL  EQU $ffff    ; COP (Computer operating properly) control



;(C)opywrite P&E Microcomputer Systems, 1998
; You may use this code freely as long as this copyright notice
; is included.